Hello, I am Shubham
Electronics Engineer
Welcome to my portfolio, I am a passionate Engineer who loves computers. Scroll down below to know more about me.
About me
![IMG_20180213_010202_277_edited_edited.pn](https://static.wixstatic.com/media/b748ce_4da3322967644546a857a47ba8c450ca~mv2.png/v1/fill/w_363,h_363,al_c,lg_1,q_85,enc_auto/IMG_20180213_010202_277_edited_edited_pn.png)
"My name is Shubham Shrivastava. I am an Electronics & Telecommunication Engineer. I come from Raipur which is the capital of Chhattisgarh.
I have done my Bachelor's in Engineering from Government Engineering College, Raipur. My final year project was Analysis of Heart Rate Using ECG signal. I love watching sports and reading books."
EDUCATION
2014-2018
Bachelor's Degree
GOVERNMENT ENGINEERING COLLEGE, RAIPUR
I completed my Bachelor's in Engineering Degree in Electronics & Telecommunication Branch with 8 CGPA. I was an active member of my college committee. Organized and participated in workshops , tech fest,cultural fest, and various sports events.
2013-2014
Higher Secondary
HOLY CROSS SENIOR SEC. SCHOOL KAPA, RAIPUR
I studied Physics, Chemistry, Maths, English and Physical Education during my higher secondary. I secured 81 percentage in my 12th CBSE board exam. I was also the House Representative of my class that year.
2011-2012
Senior Secondary
HOLY CROSS SENIOR SEC.SCHOOL KAPA, RAIPUR
I studied Maths, Science, English, Hindi, Social Science and Foundation of IT during my senior secondary. I secured 8.2 CGPA in the 10th CBSE Board exam. This year my interest grew in the field of Science and I decided to pursue a degree in Engineering.
PROJECTS
ANALYSIS OF HEART RATE USING ECG SIGNAL
This project was designed to detect two heart conditions named as Bradycardia and Tachycardia. It was hardware as well as a software-based project. We used signal processing to detect the heart rate from the ECG signal.
KEYPAD BASED SECURITY SYSTEM
This is a password-based door locking security system using 8051 microcontroller and a keypad. The opening and closing of the door were modeled by a rotating DC motor.
CARRY SELECT ADDER (32 & 64 bit)
The aim of the project was to design and simulate model for Carry Select Adder (32 bit & 64 bit) using Verilog HDL on Xilinx ISE Design.
SKILLS
![](https://static.wixstatic.com/media/baac51_5f3719a2964e482ebdf6c889115744c0~mv2_d_4896_3264_s_4_2.jpg/v1/fill/w_765,h_510,al_c,q_85,usm_0.66_1.00_0.01,enc_auto/baac51_5f3719a2964e482ebdf6c889115744c0~mv2_d_4896_3264_s_4_2.jpg)
MICROSOFT OFFICE
C PROGRAMMING
MATLAB
COMPUTER NETWORKS
VERILOG
MICRO CONTROLLER
DIGITAL ELECTRONICS
COMMUNICATION SYSTEMS